Some processors use millicode routines to implement certain complex system functions. For some of these system functions it is necessary that there be no unrelated cache activity while the function is executing, such as, for example, loading lines into the cache or translating addresses. For example, when updates to the time-of-day clock are taking place, they must occur within a certain amount of time and cannot tolerate long delays. Also, for certain operations related to the translator, the translator cannot be called upon to do unrelated translations during the operation. In addition, the protocols for communicating with a cache are such that when a locked line is held by millicode, no operations may be initiated that require completion before the line is released. If any such operations are initiated, there is a possibility of deadlocking the system.
For prior processors having a single cache used for operands, these problems have been dealt with by making sure that all lines that might be referenced during the function were in the cache before the function began. This was assured by making a line-touch reference to the lines just before beginning the function. This caused any lines that were not already in the cache to be loaded, so that during execution of the function the data would be found in the cache. This was accomplished using an ordinary instruction that caused a fetch from the storage locations in the line.
Unfortunately, for processors employing separate operand and instruction caches, the above technique only works to make sure that operand data is in the operand cache. Accordingly, for such processors it is desirable to provide an instruction that can be used to make a line-touch reference to locations from which instructions will be fetched in order to make sure that they are in the instruction cache.
This disclosure presents a method for instructing a computing system to ensure that a line is present in an instruction cache that includes selecting a line-touch instruction, recognizing the line-touch instruction as a type of branch instruction where the branch is not taken, executing the line-touch instruction to fetch a target line from a target address into the instruction cache, and interlocking the execution of the line-touch instruction with the completion of the fetch of the target line in order to prevent execution of the instruction following the line-touch instruction until after the target line has reached the cache.